HIGH PERFORMANCE INTEGRATED CIRCUIT CHIP PACKAGE AND METHOD OF MAKING SAME

A high performance integrated circuit chip package (10) includes a support (15) substrate (12) having conductors extending from one face to the opposite face thereof and a multilayer wiring substrate (16) on the opposite face of the support substrate for connecting chips mounted thereon to one another and to the conductors. A heat sink includes microchannels at one face thereof, with thermally conductive cushions connecting the one face of the heat sink (26) with the exposed back sides of the chips, to provide a high density chip package with high heat dissipation. The multilayer wiring substrate (16) may be formed by a self-aligned thin film wiring method, with a self-aligned lift off method being employed to form internal wiring planes. The support substrate and heat sink may be formed of blocks of material having thermal expansion matching silicon. The cushions are a low melting point solder, preferably pure indium, and are sufficiently thick to absorb thermal stresses, but sufficiently thin to efficiently conduct heat from the chips to the heat sink.