PROCESS FOR INVESTIGATING THE LATCH-UP EXTENSION IN CMOS CIRCUITS

A knowledge of the latch-up extension in integrated CMOS circuits is of decisive importance for the microelectronic device development engineer in order to be able to reduce latch-up sensitivity in such circuits by a design change or technological measures. Since the known methods of investigating t...

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Hauptverfasser:	QUINCKE, JORG, PLIES, JORG NAT
Format:	Patent
Sprache:	eng ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS SEMICONDUCTOR DEVICES TESTING
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