NMOS analog voltage comparator
An NMOS analog voltage comparator is disclosed having two matching cascaded inverter-pairs (gates 3, 4, 7, 8 and gates 1, 2, 5, 6). The comparator has fast response time, is not sensitive to temperature variations while operating, and operates independent of integrated circuit parameter variations e...
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Format: | Patent |
Sprache: | eng ; fre ; ger |
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Zusammenfassung: | An NMOS analog voltage comparator is disclosed having two matching cascaded inverter-pairs (gates 3, 4, 7, 8 and gates 1, 2, 5, 6). The comparator has fast response time, is not sensitive to temperature variations while operating, and operates independent of integrated circuit parameter variations encountered during circuit manufacture. |
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