Shared micro-ram with micro-rom linking

Shared micro-ram with micro-rom linking

A processor system utilizing a single shared RAM array, for storing microcode and other function data, with the shared array coupled to the processor by a single shared ADR/DATA bus. In one embodiment, an onboard ROM stores selected lines of microcode and a ROM accessing system supplies microcode fr...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: LENOSKI, DANIEL E
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A processor system utilizing a single shared RAM array, for storing microcode and other function data, with the shared array coupled to the processor by a single shared ADR/DATA bus. In one embodiment, an onboard ROM stores selected lines of microcode and a ROM accessing system supplies microcode from the ROM when the shared RAM array is busy performing some other RAM function.