Bidirectional power fet with integral avalanche protection

Lateral FET structure is disclosed for bidirectional power switching, including AC application. Integral avalanche protection is provided by a pair of isolation regions forming protective barrier junctions with a common layer, which junctions are in parallel with the reverse blocking junctions of the power FET in the OFF state and have a lower reverse breakover threshold for protecting the latter. A plurality of integrated FETs each have left and right source regions and left and right channel regions with a common drift region therebetween, and conduct current in either direction according to the polarity of main terminals.