Coherent interface with wraparound receive and transmit memories

An interface for use between an asynchronous bus and a signal processor is disclosed. The interface utilizes both a wraparound receive and transmit memory to ensure coherency with very little processor overhead.

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1. Verfasser: TULPULE, BHALCHANDRA RAMCHANDRA
Format: Patent
Sprache:eng ; fre ; ger
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Zusammenfassung:An interface for use between an asynchronous bus and a signal processor is disclosed. The interface utilizes both a wraparound receive and transmit memory to ensure coherency with very little processor overhead.