Control unit for a microprogrammable processor

A controller (20) of a microprocessor includes a control store (201, 203) for storing microinstructions. A programmable logic array (PLA 204), enabled when a predetermined instruction type is to be executed, translates the operand field of the microinstruction into information bits which are used to modify the microinstruction as it is being fetched from the control store. The bits of the microinstruction which are changeable are coupled from the control store (201, 203) to a first input of a multiplexer (202). The output of the PLA (204) is coupled to a second input of the multiplexer. A select signal for the multiplexer is generated when the predetermined instruction type is to be executed, thereby effecting a modification of the fetched microinstruction, and yielding a modification to the basic operation of the microinstruction.