L-fast fabrication process for high speed bipolar analog large scale integrated circuits

A fabrication process for integrated circuits having linear bipolar transistors and other circuit elements. The process defines collector contact (32), base (34), and isolation (36) regions in one masking operation. Subsequent masking layers of photoresist (40, 42, 46) are used to shield selected regions during implantation of exposed regions. Circuit density is improved through the use of aluminum doped isolation regions (36). The base region is doped in a single ion implantation step, which is followed by low temperature deposition of a covering oxide layer (48).