ARITHMETIC OPERATION UNIT AND ARITHMETIC OPERATION CIRCUIT

In an arithmetic operation unit (103) comprising at least a group of registers (400) and an arithmetic operation circuit (403), bipolar transistors (512, 1011, 1411, 2006, 2008) and field effect transistors (500, 503, 504) mixedly exist.

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Bibliographische Detailangaben
Hauptverfasser:	IWAMURA, MASAHIRO, MAEJIMA, HIDEO, KURITA, KOUZABUROU, MASUDA, IKURO, UENO, MASAHIRO, HOTTA, TAKASHI
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS PHYSICS TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE
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Beschreibung
Zusammenfassung:	In an arithmetic operation unit (103) comprising at least a group of registers (400) and an arithmetic operation circuit (403), bipolar transistors (512, 1011, 1411, 2006, 2008) and field effect transistors (500, 503, 504) mixedly exist.