Reconfigurable memory

In a reconfigurable memory a spare chip (40) is substituted for a faulty chip when an uncorrectable error condition results from an alignment of two errors in bit positions accessed through the same chip row decoder (12) while an address bit permutation apparatus (30, 32) is used to misalign faulty...

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Bibliographische Detailangaben
Hauptverfasser: SHAH, SIDDHARTH ROMESHCHANDRA, SINGH, SHANKER, SINGH, VIJENDRA PAL
Format: Patent
Sprache:eng ; fre ; ger
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Beschreibung
Zusammenfassung:In a reconfigurable memory a spare chip (40) is substituted for a faulty chip when an uncorrectable error condition results from an alignment of two errors in bit positions accessed through the same chip row decoder (12) while an address bit permutation apparatus (30, 32) is used to misalign faulty bits when they occur in bit positions accessed through different decoders.