Priority system for channel subsystem

A priority circuit handles requests by three components of a data processing system for access to several resources of the system that can be accessed one at a time on each operating cycle of the system. A logic circuit receives requests by the requesters (30-32) and grants access (64-66) to one req...

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Bibliographische Detailangaben
Hauptverfasser: ZIMMERMAN, TERRENCE KEITH, CAPOWSKI, ROBERT STANLEY
Format: Patent
Sprache:eng ; fre ; ger
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Beschreibung
Zusammenfassung:A priority circuit handles requests by three components of a data processing system for access to several resources of the system that can be accessed one at a time on each operating cycle of the system. A logic circuit receives requests by the requesters (30-32) and grants access (64-66) to one requester on a priority basis. The logic circuit has means (39, 62, 63) for establishing a particular priority sequence, and the priority circuit includes means (69, 72, 73) for stepping the logic circuit through a cycle of different priority sequences. In a repeating cycle of these steps, each requester is given the highest priority at least once. The stepping means (72) is responsive to a control code to establish a particular stepping sequence. In a longer sequence, the lowest priority requester is given the highest priority once and higher priority requesters are given the highest priority several times so that in a complete cycle of steps the requesters have a different relative priority. In shorter cycles, the lowest priority requester is still given highest priority once and the higher priority requesters are given highest priority a few times so that in the shorter cycles the lowest priority requester has a higher relative priority. The priority circuit also includes means (48-53) for matching a request for a resource with the availability of the resource so that a requester contends for priority only if the resource is in fact available.