FET MEMORY WITH DRIFT REVERSAL

in response to a periodic pulse on a lead (21), an FET (47) connected gate-to-drain is given in a low current circuit, producing a threshold potential on node F. This is connected through switch FET's (61) to the word lines (1) of a memory. This holds the gates of memory access switches (5) at threshold. A higher voltage on the bit line (7) takes off change in memory cells (40) which have drifted from zero charge stored toward the substrate voltage. Absence of the periodic signal activates an FET (59) which grounds node F. High voltage applied to a word line (1) switches off the FET (61) connecting that line to node F.