MICROPROGRAM SEQUENCER FOR MICROPROGRAMMED CONTROL UNIT

Sequencer means for a microprogrammed control unit which develops consecutive addresses of microprograms, branches to subroutines with address saving and possible return to microprogram, as well as interrupting microprogram forcings with address saving of the interrupted microprograms. In order to allow the double saving of microprogram and subroutine addresses in case of concurrent interruptions and branches, the sequencer means is provided with two address generation loops each including a register. The two loops have a common portion to which they accede through a multiplexer. The first loop is further coupled to a saving register stack. While the first loop executes the saving of a microprogram address and the latching or a branch address received from the second loop, the second loop executes a first updating and related latching or interrupting microprogram address. During the following cycle, by command of the first microinstruction of the interrupting microprogram, the second loop performs a first updating and related latch of the interrupting microprogram address and the first loop saves into the register stack the branch address and performs a second updating and related latching of the interrupting microprogram address.