Mikroprozessor mit Taktsteuerungseinrichtung

A microcomputer having a frequency divider for dividing, at multiple stages, the frequency of the clock generated by an oscillator circuit, a selector for selecting from among the resulting divided frequency clocks, a counter for counting the divided frequency clock selected, a switch for changing the driving ability of the oscillator circuit, and a select bit in which data on selecting the on or off control over the switch is written, wherein the driving ability of the oscillator circuit is set large in initiating oscillation and low after initiating the supply of its internal clock, independently of the program.