Leiterplatte
A circuit pattern layer (6) is formed over the surface of a laminated board (4) of a printed circuit board for connection to a connector (24) such that it includes one array of solder pads (10). The circuit pattern layer (6) has its surface covered with a solder mask layer (8). The solder mask layer...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | ger |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A circuit pattern layer (6) is formed over the surface of a laminated board (4) of a printed circuit board for connection to a connector (24) such that it includes one array of solder pads (10). The circuit pattern layer (6) has its surface covered with a solder mask layer (8). The solder mask layer (8) has a U-shaped recess (14) at the area of each solder pad (10) whereat the solder pad (10) is exposed. Upon the soldering of connection terminals (22) to the solder pads (10) at the areas of the U-shaped recesses (14), molten solder is kept in the U-shaped recesses (14) and is prevented from flowing onto the adjacent connection terminals (22). |
---|