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A backside metallization scheme for semiconductor devices includes a vanadium layer (16) disposed on the backside (14) of a wafer (10) and a silver layer (18) disposed on the vanadium layer (16). An optional intermediate layer (20) comprising either a mixture of vanadium and silver or nickel may be...

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Bibliographische Detailangaben
Hauptverfasser:	RAGONA, ANGELA, PHOENIX, ARIZONA 85018, US, SHARMA, RAVINDER K., MESA, ARIZONA 85213, US, LYTLE, WILLIAM H, CHANDLER, ARIZONA 85226, US, HILEMAN, BENNETT L., TEMPE, ARIZONA 85283, US
Format:	Patent
Sprache:	ger
Schlagworte:	BASIC ELECTRIC ELEMENTS CHEMICAL SURFACE TREATMENT CHEMISTRY COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING MATERIAL WITH METALLIC MATERIAL COATING METALLIC MATERIAL DIFFUSION TREATMENT OF METALLIC MATERIAL ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL METALLURGY SEMICONDUCTOR DEVICES SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION
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Beschreibung
Zusammenfassung:	A backside metallization scheme for semiconductor devices includes a vanadium layer (16) disposed on the backside (14) of a wafer (10) and a silver layer (18) disposed on the vanadium layer (16). An optional intermediate layer (20) comprising either a mixture of vanadium and silver or nickel may be disposed between the vanadium layer (16) and the silver layer (18). The vanadium layer (16) exhibits excellent adhesion characteristics on the backside (14) of wafers (10) having a finish at least as fine as a 300 grit equivalency while the silver layer (18) exhibits excellent solderability characteristics.