LESE-/SCHREIBE-/WIEDERHERSTELLUNGSSCHALTUNG FÜR SPEICHERMATRIZEN

LESE-/SCHREIBE-/WIEDERHERSTELLUNGSSCHALTUNG FÜR SPEICHERMATRIZEN

A read/write/restore circuit is disclosed for use in a memory array such as a static RAM array. The circuit employs data and data-complement signals having three states in combination with a two-state address signal to perform read, write and restore functions for the array, to reduce the number of...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: MONTEGARI, FRANK, ALFRED, WAPPINGERS FALLS, NY 12590, US
Format: Patent
Sprache:ger
Schlagworte:
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Beschreibung
Zusammenfassung:A read/write/restore circuit is disclosed for use in a memory array such as a static RAM array. The circuit employs data and data-complement signals having three states in combination with a two-state address signal to perform read, write and restore functions for the array, to reduce the number of components and control lines needed. The circuit is preferably implemented in BICMOS technology.