Lead on chip system using multi-layer tape

Lead on chip system using multi-layer tape

A lead on chip arrangement is used in which there is an intermediate tape employed to provide a stabilising function for the delicate leads which are bonded to the chip surface. The chip (1) has partial tapes (51,52) used to secure the leads (2) and with bond wires (4) connecting to terminal points...

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Bibliographische Detailangaben
Hauptverfasser: BOOTZ, ERIC., 93309 KELHEIM, DE, ROGALLI, MICHAEL., 84056 ROTTENBURG, DE, RHODE, VOLKER., 85661 FORSTINNING, DE
Format: Patent
Sprache:eng ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Zusammenfassung:A lead on chip arrangement is used in which there is an intermediate tape employed to provide a stabilising function for the delicate leads which are bonded to the chip surface. The chip (1) has partial tapes (51,52) used to secure the leads (2) and with bond wires (4) connecting to terminal points (3). The tapes are formed with a polyamide carrier and double-sided adhesive coating.