Data transfer circuit between data processing and transmission systems - handles data in two separate data memories with higher order address provided by common unit and lower order by separate units

Data transfer circuit between data processing and transmission systems - handles data in two separate data memories with higher order address provided by common unit and lower order by separate units

A bus system (BUS) handles data transfers between different data processors. The data is transmitted in bursts consisting of words. The circuit used has a pair of data banks (DB1,DB), with each location handling words. A common address unit (AX) is used for the higher value address locations, while...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: EHMER, CHRISTIAN, 8000 MUENCHEN, DE
Format: Patent
Sprache:eng ; ger
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A bus system (BUS) handles data transfers between different data processors. The data is transmitted in bursts consisting of words. The circuit used has a pair of data banks (DB1,DB), with each location handling words. A common address unit (AX) is used for the higher value address locations, while the lower values are handled by separate addresses (A1,A2) relating to the two data banks. The addressing units are in the form of binary counters. Transfer takes place with write enable (WE) and output enable (OE) signals. ADVANTAGE - High transfer handling rates at economical cost.