Bus system for information processing appts. - contains processor, memory and system buses and connection controller generating data path control and address signals

A bus system for an information processing device contains a processor (111) bus connected to at least one processor (101), a memory bus (112) connected to at least one main memory (104) and a system bus (113). Data path control signals are generated by a connection controller which also generates a control signal and an address signal for one of the processor, system and memory buses. A data switching device is connected to data buses of each of the processor bus, memory bus and system bus for direct transfer, in response to the data path control signal, of data between data buses.