DE3915510
The inverter circuit has gate-controlled semiconductors (V1,V2) e.g. thyristors for each phase of the AC output circuit fed via a current limiting inductor (L1), with freewheel diodes (V3,V4). Voltage rise limitation at switch off points is effected by capacitors (C1,C2) and diodes (V5,V6). Auxiliar...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | The inverter circuit has gate-controlled semiconductors (V1,V2) e.g. thyristors for each phase of the AC output circuit fed via a current limiting inductor (L1), with freewheel diodes (V3,V4). Voltage rise limitation at switch off points is effected by capacitors (C1,C2) and diodes (V5,V6). Auxiliary capacitors (C3,C4) minimise the effect of overswing during the charging of capacitors (C1,C2) and have large capacity. A gap-free or high permeability transformer (T1) provides efficient energy feedback to the DC source via polarising diode (V90). USE/ADVANTAGE - High power drives e.g. electric traction. Energy efficient with low circuit loss and feedback capability. Can be constructed as a two or three terminal network for single or multiphase applications. Handles higher voltage. Current and frequency than previous installations due to limitation of voltage gradients and thermal loss. |
---|