SCHALTUNGSANORDNUNG, DIE DURCH EIN SIGNAL MIT EINER ABLENKFREQUENZ SYNCHRONISIERT WIRD

A phase-lock loop circuit of a video display apparatus is synchronized by a horizontal synchronizing input signal. The phase-lock loop circuit includes a frequency-to-voltage converter that is responsive to the synchronizing input signal for generating a control voltage indicative of the frequency of the synchronizing input signal. A voltage-to-current converter responsive to the control voltage generates a control current that is indicative of the frequency of the input signal. The control current varies the free running frequency of a controlled oscillator of the phase-lock loop circuit such that the free running frequency of the oscillator is directly related to the frequency of the input signal. The phase of the output signal of the oscillator is controlled by a second control current that is indicative of the phase difference between the oscillator output signal and the synchronizing input signal. When the frequency of the input signal is lower than a predetermined frequency, the first control current is at a level that causes the free running frequency to be above a predetermined minimum frequency.