SCHREIB/LESE-HALBLEITERSPEICHER

A random access read/write MOS memory device consisting of an array of rows and columns of one-transistor memory cells employs a bistable sense amplifier circuit at the centre of the dynamic type in that coupling transistors connect the column line halves to the cross-coupled driver transistors. Active load devices connected to the column line halves provide pull-up of the voltage on the one-going column line half to a full Vdd level. An improved circuit is used for the address inputs, data inputs, or the like, to permit undershoot of the voltage on input lines, while not requiring substrate bias on the semiconductor chip. Buffers function to latch the data or address to allow the inputs to change states. The buffer is activated by TTL level inputs, exhibits low capacitance at its input, and switches states fast enough to allow rapid multiplexing of the addresses. Noise immunity is improved by selective implants of some of the transistors. A heavily doped guard ring, N+ for a P-type substrate, connected to Vdd, surrounds the transistors in the input stages to avoid the effects of injection of minority carriers by forward biasing of PN junction regions at the input.