SCHALTUNGSANORDNUNG ZUR STEUERUNG DER SPERRVORSPANNUNG VON HALBLEITERBAUELEMENTEN

A back gate bias voltage generator circuit consists of three MOS transistors (Q4, Q5, Q6) with a separate load element (Q1, Q2, Q3) coupled to the drain of each and a voltage clamp (Q7) connected to an output terminal (16). A terminal at the potential of a power supply (VCC) serves as one input and...

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Bibliographische Detailangaben
Hauptverfasser:	ROSENZWEIG,WALTER, CHARLES DUMBRI,AUSTIN
Format:	Patent
Sprache:	ger
Schlagworte:	BASIC ELECTRIC ELEMENTS BASIC ELECTRONIC CIRCUITRY CONTROLLING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE PHYSICS PULSE TECHNIQUE REGULATING SEMICONDUCTOR DEVICES STATIC STORES SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
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Beschreibung
Zusammenfassung:	A back gate bias voltage generator circuit consists of three MOS transistors (Q4, Q5, Q6) with a separate load element (Q1, Q2, Q3) coupled to the drain of each and a voltage clamp (Q7) connected to an output terminal (16). A terminal at the potential of a power supply (VCC) serves as one input and a terminal at the substrate potential (VSub) serves as another input. When the power supply (VCC) potential and the substrate potential are within normal operating ranges, the output terminal (16) assumes a reference potential (VSS). The potential of the output terminal increases in magnitude if either of the two input potentials (VSS, VSub) goes outside preselected operating ranges.