Oxide layer with varying dimensions for MOS transistor - where exact thickness of gate oxide is obtd. by oxidn. of polycrystalline silicon layer
A transistor zone is covered by an oxide layer (a) which is pref. formed by thermal oxidn. The gate zone of the transistor is then locally covered by formation of a layer of polycrystalline silicon, which is oxidised to produce a gate oxide with prescribed thickness, length and breadth. The layer is...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng ; ger |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A transistor zone is covered by an oxide layer (a) which is pref. formed by thermal oxidn. The gate zone of the transistor is then locally covered by formation of a layer of polycrystalline silicon, which is oxidised to produce a gate oxide with prescribed thickness, length and breadth. The layer is pref. obtd. by first covering the entire surface with polycrystalline Si, then masking and etching the latter to leave a local layer above the gate zone. The invention provides a simple but accurate method for obtaining a gate oxide with the required dimensions. |
---|