Read-write memory content protection for telephone systems - has gating circuit to ensure read-write instruction is correct before data is changed

The control of read-write memories used in telephone communication systems is effected in such a way to avoid the loss of stored information due to errors in addressing. Typically a number of memories (B1, B2, B3, B4) are operated from a central control circuit (ST) that insures read-write commands (RW), handles data and receives outputs (A, D) and provides an identifying address for the memories. If one memory (B3) receives a read write (RW) instruction, the control unit generates a separate signal that is latched (K1) and both signals are combined in an AND gate (G1). Only if both signals are present is the write process allowed.