DE2524046

A processor including a plurality of synchronized subprocessors, each implemented on an integrated circuit substrate and each having an instruction register and instruction executing circuits for independently executing a portion of the functions required by an instruction being simultaneously execu...

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Hauptverfasser: OMAN, PRICE WARD, WAPPINGER FALLS, N.Y., US, HOLMES JUN., ARTHUR WILBERT, WOODSTOCK, N.Y., US, PADDOCK, RICHARD CHARLES, KINGSTON, N.Y., US, PRICE, DONALD WALTER, LAKE KATRINE, N.Y., US
Format: Patent
Sprache:eng
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Zusammenfassung:A processor including a plurality of synchronized subprocessors, each implemented on an integrated circuit substrate and each having an instruction register and instruction executing circuits for independently executing a portion of the functions required by an instruction being simultaneously executed by each subprocessor. Execution is initiated and synchronized by simultaneously loading the same instruction into each subprocessor.