DE2523398

A multiple of telephone or like communications signal transmission lines are interconnected in time division multiplex (TDM) mode by integrated semiconductor switching circuitry. Preferably, electronic solid state structure most suitable for embodying field effect transistors (FET) and like associated devices is arranged in modular chip components permitting extension to large numbers of transmission lines, as desired. Input or calling transmission line terminals are connected to node busses by FET switches in predetermined time sequence under control of a central processing unit. Preferably, a separate timing pulse train generating circuit is used for the switching operation. Output or called transmission line terminals are connected to the node busses in predetermined time sequence at which every calling line is sampled at least once each switching cycle. Signal bandwidth is adjustable by arranging the switching circuitry to sample a calling line one, two, or more times in each switching cycle. Conventional semiconductor structure inherently forms capacitors of substantial reactance between the node busses and points of reference potential. Circuitry is incorporated in the arrangement for discharging the capacitors prior to connecting the input signal lines to the node busses. The circuitry also incorporates FET switch elements arranged for isolating uncalled output terminals from the switching circuitry, and for short circuiting each pair of idle output terminals.