SCHALTVERZOEGERUNGSFREIE BISTABILE SCHALTUNG

Disclosed is a semiconductor circuit including a latching means operatively connected to an intermediate node between an input means and an output means for providing a latched output signal without introducing circuit delay due to the latching function.

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Bibliographische Detailangaben
Hauptverfasser: CHU, WILLIAM MAN-SIEW, POUGHKEEPSIE, LEE, JAMES MINDA, LUCKETT, GARY CLAIR
Format: Patent
Sprache:ger
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Beschreibung
Zusammenfassung:Disclosed is a semiconductor circuit including a latching means operatively connected to an intermediate node between an input means and an output means for providing a latched output signal without introducing circuit delay due to the latching function.