Taktgenerator

The clock generator includes two phase generator stage (22) with outputs via inverters (23,24) to a bank of drive gating stages (27). The units are coupled in feedback loops (P1P,P2P) to a phase locked loop, PLL, stage. The generator is counter based and provides a multiple frequency of the input cl...

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Bibliographische Detailangaben
1. Verfasser:	ISHIMI, KOUICHI
Format:	Patent
Sprache:	ger
Schlagworte:	AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS PHYSICS PULSE TECHNIQUE RESONATORS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Beschreibung
Zusammenfassung:	The clock generator includes two phase generator stage (22) with outputs via inverters (23,24) to a bank of drive gating stages (27). The units are coupled in feedback loops (P1P,P2P) to a phase locked loop, PLL, stage. The generator is counter based and provides a multiple frequency of the input clock signal. The generator produces a number of outputs having a defined phase relationship.