CAD integrated circuit manufacturing method
The method involves forming at least one layer of electronic components and conductive tracks on a silicon substrate according to a fixed circuit plan. Tools e.g. masks are constructed to form the components, and conductive tracks with fixed technological basic data. The masks etc., are used in indi...
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Format: | Patent |
Sprache: | eng ; ger |
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Zusammenfassung: | The method involves forming at least one layer of electronic components and conductive tracks on a silicon substrate according to a fixed circuit plan. Tools e.g. masks are constructed to form the components, and conductive tracks with fixed technological basic data. The masks etc., are used in individual processes to form the circuit elements and conductive tracks on the substrate. The tools, e.g. masks are first manufactured virtually. Integrated circuits are then manufactured virtually in the frame of a computer simulation with the virtual masks. When the virtual circuit deviates from a theoretical optimal mask, the mask is adjusted. The virtual circuit is checked for maintaining minimum requirements, e.g. minimum and maximum dimensions. The integrated circuit and the required tools, e.g. mask are first manufactured when the minimum requirements are achieved with the virtual integrated circuit. |
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