Digital video data decoder and associated control procedure

The digital video data decoder includes a synchronising pattern detecting and generating section (30), containing a large number of stored synchronising signals, and matching the stored synchronising data with the format of the input data. A sequence control section (40) is used to extract the input...

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Bibliographische Detailangaben
1. Verfasser:	UM, IN-YONG, SONGNAM, KYOUNGGI, KR
Format:	Patent
Sprache:	eng ; ger
Schlagworte:	ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY INFORMATION STORAGE INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORDCARRIER AND TRANSDUCER PHYSICS PICTORIAL COMMUNICATION, e.g. TELEVISION
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Beschreibung
Zusammenfassung:	The digital video data decoder includes a synchronising pattern detecting and generating section (30), containing a large number of stored synchronising signals, and matching the stored synchronising data with the format of the input data. A sequence control section (40) is used to extract the input data from starting data and user data. A buffer section (70) stores the sequence control unit output, and a cyclical redundancy check section (50) determines whether or not there are errors in the input data so that compensation can be made as necessary. A direct memory accessing section (60) outputs all the data, including the compensating data, directly to the external system, without passing it through the CPU control section first.