Semiconductor memory structure for DRAM, VSRAM and PSRAM

The semiconductor memory includes a memory cell field (7), an operating mode indicating unit (18,19), a clock signal unit (20), an internal address providing unit (10), and a row selection unit (11,12,42). The memory field has several cells (MC) arranged in a matrix of rows and columns. The mode indicating unit receives a mode signal which it tests and provides a result for. The clock unit receives this result and produces the appropriate clock signals. The internal address unit receives the clock and produces an internal address signal independent of the external address signal. This row selection unit receives the clock signal and the address signal and in synchronism and selects a row of cells in the memory field in agreement with the internal address signal.