Herstellungsverfahren für ein DRAM hoher Dichte mit reduziertem Peripherievorrichtungsbereich

Herstellungsverfahren für ein DRAM hoher Dichte mit reduziertem Peripherievorrichtungsbereich

A dynamic random access memory (DRAM) structure having a distance less than 0.14 um between the contacts to silicon and the gate conductor is disclosed. In addition a method for forming the structure is disclosed, which includes forming the DRAM array contacts and the contacts to silicon simultaneou...

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Bibliographische Detailangaben
Hauptverfasser: BAKER, STEVEN M, GERSTMEIER, GUENTER, COUSINEAU, BRIAN, LEE, JINHWAN, MALDEI, MICHAEL, BERRY, JON S. II
Format: Patent
Sprache:ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A dynamic random access memory (DRAM) structure having a distance less than 0.14 um between the contacts to silicon and the gate conductor is disclosed. In addition a method for forming the structure is disclosed, which includes forming the DRAM array contacts and the contacts to silicon simultaneously.