Halbleiterspeicherbauelement mit mehreren Speicherfeldern und zugehöriges Datenverarbeitungsverfahren

The invention is directed to data input/output organization system and method in a semiconductor memory device. The memory device has a plurality of memory arrays, in one embodiment, an odd number of memory arrays. The arrays are divided into blocks, and the blocks are divided into segments. A control circuit provides control signals to the memory arrays such that data is input and/or output to and from the memory device in multiples of nine bits. The data bits are input or output simultaneously without the need for multiplexing circuitry. This results in reduced power consumption and increased memory processing speed.