Prozessor mit Wiederholarchitektur mit schnellen und langsamen Wiederholpfaden

According to one aspect of the invention, a microprocessor is provided that includes an execution core, a first replay mechanism and a second replay mechanism. The execution core performs data speculation in executing a first instruction. The first replay mechanism is used to replay the first instru...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HINTON, GLENN J, SAGER, DAVID A, BOGGS, DARRELL D, UPTON, MICHAEL
Format: Patent
Sprache:ger
Schlagworte:
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Beschreibung
Zusammenfassung:According to one aspect of the invention, a microprocessor is provided that includes an execution core, a first replay mechanism and a second replay mechanism. The execution core performs data speculation in executing a first instruction. The first replay mechanism is used to replay the first instruction via a first replay path if an error of a first type is detected which indicates that the data speculation is erroneous. The second replay mechanism is used to replay the first instruction via a second replay path if an error of a second type is detected which indicates that the data speculation is erroneous.