Background current inhibition reading-out circuit for infrared focal plane array

The utility model relates to a background current inhibition read-out circuit for infrared focal plane arrays. The circuit comprises a buffering direct injection structure, a current storage device of a background current and a dark current, and a related double-sampling circuit. The utility model has the improvement that the control end of the storage device 100 of the background current and the dark current is a grid of an NMOS pipe 106 and is orderly connected with a PMOS pipe 108, an analog-digital\digital-analog converter 109 and a non-volatile storage device 110 so as to form a circuit of the background current and the dark current preserved by storage and automatic refreshing. The circuit of the utility model uses the current storage device to carry out the background current automatic inhibition, and adopts the analog-digital and digital-analog converter and the non-volatile storage device to keep voltage on a capacitor in the current storage device not to be attenuated, overcomes shortcomings that the existing high background current inhibition read-out circuit needs to be periodically corrected by mechanical electronic devices in use, and the circuit has quite high charge processing capability.