Precision delayer

The utility model provides a precision delayer, which belongs to an electronic measurements field. The precision delayer is composed of a digital time-delay phase-lock loop, a multi-way selection switch, a counter, a latch, a comparator, a flip-flop and a gate in a programmable component. The precision delayer uses the DLL technique of the digital time-delay phase-lock loop to cause an input clock with f0 frequency through the double frequency to generate four phase shifting 90 DEG clocks with 2 * f0 or 4 * f0 frequencies. A precision delayer with 1/8 or 1/16 of an original clock period step size is obtained through the switching over of the clock and the delaying time of a digit circuit. The precision delayer is coordinately used with an analog to digital converter with relatively lower speed and can achieve the sampling precision with the high resolution. Because the utility model adopts the programmable component and the digit circuit or adopts the programmable component totally instead of an expensive accurate programmable time-delay or a high-speed analog to digital converter, the cost is reduced, and the circuital alignment is simplified.