Chip-on-wafer device structure on substrate
A chip-on-wafer-on-substrate (CoWoS) device structure is provided, including: a package substrate; an interposer over the package substrate; a first die and a second die disposed on the interposer, where the first die has a first bottom surface and the second die has a second bottom surface, where a...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | A chip-on-wafer-on-substrate (CoWoS) device structure is provided, including: a package substrate; an interposer over the package substrate; a first die and a second die disposed on the interposer, where the first die has a first bottom surface and the second die has a second bottom surface, where a plane coplanar with the first bottom surface and the second bottom surface has a slope greater than zero, and where the first die is spaced from the second die at a first edge of the first die by a first distance, a second distance is spaced from the second crystal grain at a second edge of the first crystal grain, the second edge is opposite to the first edge, and the first distance is equal to the second distance.
提供一种基板上晶圆上芯片(CoWoS)装置结构,包括:封装基板;中介层,在封装基板上方;第一晶粒与第二晶粒,设置在中介层上,其中第一晶粒具有第一底表面且第二晶粒具有第二底表面,其中与第一底表面和第二底表面共平面的平面具有大于零的斜率,且其中第一晶粒在第一晶粒的第一边缘处与第二晶粒间隔第一距离,且在第一晶粒的第二边缘处与第二晶粒间隔第二距离,第二边缘与第一边缘相对,且其中第一距离等于第二距离。 |
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