Transistor combination device of integrated circuit memory
The utility model discloses a device for combining transistors of an integrated circuit memory, which comprises a bottom plate, a sliding chute is arranged at the top of the bottom plate, a first sliding block slides in the sliding chute, a sliding plate slides at the top of the bottom plate, the sl...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The utility model discloses a device for combining transistors of an integrated circuit memory, which comprises a bottom plate, a sliding chute is arranged at the top of the bottom plate, a first sliding block slides in the sliding chute, a sliding plate slides at the top of the bottom plate, the sliding plate is fixedly connected to the top of the first sliding block, and a sliding mechanism for sliding the sliding plate is arranged at the bottom of the bottom plate. A plurality of connecting boxes are arranged in the sliding plate, the connecting boxes are all arranged at the top of the sliding plate, side plates are fixedly connected to the two sides of the top of the sliding plate, the connecting boxes are all arranged between the two side plates, and adjusting mechanisms for adjusting the connecting boxes are arranged at the tops of the side plates. According to the utility model, through the arrangement of the plurality of connecting boxes, when the transistors are conveyed, the distance between the tra |
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