Redistribution layer for integrated circuit and integrated circuit
The embodiment of the utility model relates to a redistribution layer for an integrated circuit and the integrated circuit. A redistribution layer for an integrated circuit includes: a conductive interconnect layer; a conductive body portion in electrical contact with the conductive interconnection...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The embodiment of the utility model relates to a redistribution layer for an integrated circuit and the integrated circuit. A redistribution layer for an integrated circuit includes: a conductive interconnect layer; a conductive body portion in electrical contact with the conductive interconnection layer; an insulating region surrounding the conductor portion, the insulating region having a hole at a surface of the conductor portion; and an insulating dielectric protection layer on the insulating region and partially extending over the surface of the electrical conductor portion, the insulating dielectric protection layer having a thickness of less than 100 nm, and the insulating dielectric protection layer being configured to provide protection against oxidation and/or corrosion to the electrical conductor portion. With embodiments of the present disclosure, electrical wafer sorting testing is advantageously permitted without the need for a pre-etch step, thereby maintaining thermomechanical stability.
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