Packaging structure of power semiconductor module

The utility model belongs to the technical field of power semiconductor devices, and particularly discloses a packaging structure and a packaging method of a power semiconductor module. The packaging structure comprises: a copper-clad ceramic substrate; the power semiconductor chip, the thermistor and the terminal are mounted on the copper-clad ceramic substrate; the power semiconductor chips form a half-bridge circuit through an interconnection structure; and the bonding wire is used for connecting the power semiconductor chip with the metal layer on the copper-clad ceramic substrate. According to the packaging structure provided by the utility model, the commutation loop is optimized through reasonable layout of the copper-clad ceramic substrate metal layer, the balance of the parallel chip commutation loop is realized, a smaller parasitic inductance value is realized, and turn-off overvoltage and switch oscillation are reduced; the driving loop adopts a Kelvin structure, so that the negative feedback influ