Semiconductor packaging structure

According to the semiconductor packaging structure provided by the invention, the dummy pattern is arranged in the blank area (the non-active area) between the edge/corner of the substrate (a position with a relatively large electric field) and the active area (the deposition area of the circuit pattern), so that deposition of conductive ions is dispersed, and the deposition thickness of the circuit pattern close to the edge/corner of the substrate is reduced; therefore, the overall thickness uniformity of the circuit pattern is improved. 本申请提供的半导体封装结构，在基板边缘/边角处(电场较大处)与主动区(线路图案的沉积区域)之间的空白区域(非主动区)设置虚设图案，来分散导电离子的沉积以降低靠近基板边缘/边角处的线路图案的沉积厚度，从而提高线路图案的整体厚度均匀性。