Three-dimensional stacked memory chip and electronic device

The embodiment of the utility model provides a three-dimensional stacked memory chip and electronic equipment. The three-dimensional stacked memory chip comprises a first dynamic memory array component, a second dynamic memory array component and a logic component, wherein the first dynamic storage array component comprises a first super block; in response to the first super block being a non-failure block, the first super block is configured to store or output priority data; the second dynamic storage array component is connected with the first dynamic storage array component in a stacked mode, the second dynamic storage array component comprises a second super block, the second super block and the first super block have the same data storage address, and the second super block is configured to store or output priority data in response to the fact that the second super block is a non-failure block. The yield of the memory chip is relatively high. 本申请实施例提供一种三维堆叠的存储芯片以及电子设备。该三维堆叠的存储芯片包括：第一动态存储阵列组件、第二动态存储阵列组件以及