Circuit with ultra-low power consumption dormancy
The utility model discloses a circuit with ultralow power consumption dormancy, which comprises a clock module, a main MCU, an auxiliary MCU, a relay module, a first battery and a second battery, the second battery is used for supplying power to the clock module and the auxiliary MCU in a dormant st...
Gespeichert in:
Hauptverfasser: | , , , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | The utility model discloses a circuit with ultralow power consumption dormancy, which comprises a clock module, a main MCU, an auxiliary MCU, a relay module, a first battery and a second battery, the second battery is used for supplying power to the clock module and the auxiliary MCU in a dormant state, and the first battery is used for supplying power to the main MCU through the relay module in a non-dormant state. The main MCU is used for receiving a first instruction and stopping supplying power to the main MCU in a dormant state, the auxiliary MCU is used for waking up the main MCU in the dormant state, and the relay module is used for disconnecting with the main MCU after receiving the first instruction so as to stop supplying power to the main MCU and reconnecting with the main MCU after receiving a second instruction so as to recover supplying power to the main MCU. According to the utility model, the power consumption is almost zero in a dormant state, so that the problem that the electric quantity of |
---|