Single-wire communication clock gating circuit

The utility model discloses a single-wire communication clock gating circuit. The circuit comprises a first transmission path, the input end of the first transmission path is connected with the signal input end of a single-wire communication clock gating circuit, and the output end of the first tran...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser:	XIAO LIANGSHAN, CHEN DINGCHANG, HUANG ZIZHU, WANG BINGQUAN, TAN XIN
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	CONTROL OR REGULATING SYSTEMS IN GENERAL CONTROLLING FUNCTIONAL ELEMENTS OF SUCH SYSTEMS MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS PHYSICS REGULATING
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Beschreibung
Zusammenfassung:	The utility model discloses a single-wire communication clock gating circuit. The circuit comprises a first transmission path, the input end of the first transmission path is connected with the signal input end of a single-wire communication clock gating circuit, and the output end of the first transmission path is connected with the first input end of a two-input logic OR gate; the input end of the second transmission path is connected with the signal input end of the single-wire communication clock gating circuit, and the output end of the second transmission path is connected with the second input end of the two-input logic OR gate; the second transmission path is used for converting a low-level signal input by the signal input end into a high-level signal and then outputting the high-level signal to the second input end of the two-input logic OR gate in a delayed manner, or converting the high-level signal input by the signal input end into a low-level signal and then outputting the low-level signal to th