SEMICONDUCTOR MEMORY DEVICE

The utility model discloses a semiconductor storage device which comprises a substrate, a plurality of bit lines, a plurality of plugs and a gap wall structure. The bit lines are arranged on the substrate in a mutually separated manner. The plugs are disposed on the substrate and alternately disposed with the bit lines. The gap wall structure is arranged on the substrate and located between the bit line and the plug, the gap wall structure comprises a first gap layer, a first gap wall and a second gap layer, and the first gap layer, the first gap wall and the second gap layer are sequentially stacked between the side wall of the bit line and the plug. Therefore, two gap layers can be formed between the bit line and the storage node plug, so that the condition of delay between resistance and capacitance is effectively improved. 本实用新型公开了半导体存储装置，其包括衬底、多条位线、多个插塞以及间隙壁结构。位线相互分隔地设置于衬底上。插塞设置于衬底上并与位线相互交替地设置。间隙壁结构设置于衬底上并位于位线以及插塞之间，其中，间隙壁结构包括第一空隙层、第一间隙壁以及第二空隙层，第一空隙层、第一间隙壁以及第二空隙层依序堆叠于位线的侧壁与插塞之间。藉此，可在位线以及存储节点插塞之间形成两层空隙层，以