Packaging structure for chip

The utility model discloses a packaging structure for a chip. The packaging structure comprises a substrate, a first bonding pad, a second bonding pad, a first light-emitting chip and a second light-emitting chip. The substrate comprises a first bonding pad fixing position and a second bonding pad f...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	CAI KELIN, XU KAI, JIANG LEYUAN, TANG BO, LI RUI, KANG XIAOHENG, YANG FEI
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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