Packaging structure for chip

The utility model discloses a packaging structure for a chip. The packaging structure comprises a substrate, a first bonding pad, a second bonding pad, a first light-emitting chip and a second light-emitting chip. The substrate comprises a first bonding pad fixing position and a second bonding pad f...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: CAI KELIN, XU KAI, JIANG LEYUAN, TANG BO, LI RUI, KANG XIAOHENG, YANG FEI
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:The utility model discloses a packaging structure for a chip. The packaging structure comprises a substrate, a first bonding pad, a second bonding pad, a first light-emitting chip and a second light-emitting chip. The substrate comprises a first bonding pad fixing position and a second bonding pad fixing position. The first bonding pad is arranged on the first bonding pad fixing position. The first bonding pad part is provided with a first light-emitting position, and the second bonding pad part is provided with a second light-emitting position. The second bonding pad is arranged on the second bonding pad fixing position, and a third light-emitting position is arranged on the second bonding pad. The first light-emitting chip is arranged on the first bonding pad through the first light-emitting position and the second light-emitting position. The second light-emitting chip is arranged on the second bonding pad through the third light-emitting position. The first light-emitting chip is arranged through the firs