Fault simulation device of binary all-optical full adder
The utility model discloses a fault simulation device for a binary system all-optical full adder, and the fault simulation device for the all-optical full adder based on an MRR fault is established for solving the problem that the MRR has a fault in the actual production and use process. According t...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The utility model discloses a fault simulation device for a binary system all-optical full adder, and the fault simulation device for the all-optical full adder based on an MRR fault is established for solving the problem that the MRR has a fault in the actual production and use process. According to the fault simulation device, a test signal generator, a control signal generator, a micro-ring resonator and a branch coupler form an on-chip optical network structure. The test signal generator continuously inputs high-level signals to the input port CW, and the control signal generator sends control signals to the three MRRs to enable the three MRRs to be in a resonant or non-resonant state. During the test signal input period, the control signal on the resonator is continuously changed, the simulated MRR fault is added, the output signals of the CO and the Y port are observed, and the collected signals are analyzed and judged.
本实用新型公开了一种二进制全光全加器的故障模拟装置,该装置针对MRR在实际生产和使用过程中会发生故障的问题,建立了基于MRR故障的全光全加器故障模拟装置。所提出的故障模 |
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